Physical Design

                            Physical Design

 

In integrated circuit design, physical design is a step in the standard design cycle which follows after the circuit design. At this step, circuit representations of the components (devices and interconnects) of the design are converted into geometric representations of shapes which, when manufactured in the corresponding layers of materials, will ensure the required functioning of the components. This geometric representation is called integrated circuit layout. This step is usually split into several sub-steps, which include both design and verification and validation of the layout.

Modern day Integrated Circuit (IC) design is split up into Front-end design using HDL's, Verification and Back-end Design or Physical Design. The next step after Physical Design is the Manufacturing process or Fabrication Process that is done in the Wafer Fabrication Houses. Fab-houses fabricate designs onto silicon dies which are then packaged into ICs.

Each of the phases mentioned above have Design Flows associated with them. These Design Flows lay down the process and guide-lines/framework for that phase. Physical Design flow uses the technology libraries that are provided by the fabrication houses. These technology files provide information regarding the type of Silicon wafer used, the standard-cells used, the layout rules, etc.

Technologies are commonly classified according to minimal feature size. Standard sizes, in the order of miniaturization, are 2μm, 1μm , 0.5μm , 0.35μm, 0.25μm, 180nm, 130nm, 90nm, 65nm, 45nm, 28nm, 22nm, 18nm... They may be also classified according to major manufacturing approaches: n-Well process, twin-well process, SOI process, etc.

The main steps in the flow are:

• Design Netlist (after synthesis)

• Floor Planning

• Partitioning

• Placement

• Clock-tree Synthesis (CTS)

• Routing

• Physical Verification

• GDS II Generation

These steps are just the basic. There are detailed PD Flows that are used depending on the Tools used and the methodology/technology. Some of the tools/software used in the back-end design are :

• Cadence (SOC Encounter, VoltageStorm, NanoRoute)

• Synopsys (Design Compiler, IC Compiler, PrimeTime)

• Magma (BlastFusion, Talus )

• Mentor Graphics (Olympus SoC, IC-Station, Calibre)

PD Basics 1

ASIC DESIGN TYPES

ASIC is mainly Divided into two Divisions
1)Logical Design(LD)
2)Physical Design(PD)

Physical Design  is Physical implementation of Design

• In Physical Design mainly Six inputs are present

1. Logical libraries      --> format is .lib    --->given by Vendors
2. physical libraries    -->format is .lef     --->given by vendors
3. Technology file       -->format is .tf       --->given by fabrication peoples
4. TLU+ file                   -->format is .TLUP-->given by fabrication people
5. Netlist                      --->format is .v       -->given by Synthesis People
6. Synthesis Design Constraints  -->format is .SDC   -->given by Synthesis People

    PHYSICAL DESIGN PROCESS.

1. DATA PREPARATION.
2. FLOOR PLAN.
3. POWER PLAN-->POWER ROUTING [PRE ROUTE]
4. PLACEMENT.-->[PRE CTS]
5. CLOCK TREE SYNTHESIS.-->CLOCK ROUTING.
6. ROUTING.-->DATA ROUTING.-->[POST ROUTE]
7. CHIP FINISHING.
8. VERIFICATION.
9. GDSII FILE.

LOGIC LIBRARIES

Logical libraries :format is .lib

1. Timing information of Standard cells,Soft macros,Hard macros.
2. functionality  information of Standard cells,Soft macros.
3. And design rules like max transition ,max capacitance, max fanout.
4. In timing information Cell delays ,Setup,Hold time are present.
5. Cell delay is Function of input transition and output load.
6. Cell delay is calculated based on lookup tables.
7. Cell delays are calculated by using linear delay models,Non linear delay models,CCS models.
8. functionality  is used for Optimization Purpose.
9. And also Contain Power information.
10. And contains Leakage power for Default cell,Leakage Power Density for cell,Default Input voltage , Out put voltage.

And PVT contains ------->Cell leakage Power
                                   -------->Internal Power
                                   --------->Rise Transition
                                  ----------->fall transition
                                   ---------->>Setup rise
                                  ----------->setup fall
                                  -------------->Hold rise
                                 ------------->Hold fall
                              ----------------->cell rise
                                ---------------->cell fal
                                -------------------->Pin Capacitance

And it contains A view(sub directory) i.e. LM(Logical Model view)view.
It contains logical libraries.

PHYSICAL LIBRARIES

Physical libraries: format is .lef:

1. physical information of std cells,macros,pads.
2. Pin information.
3. Define unit tile placement.
4. Minimum Width of Resolution.
5. Hight of the placement Rows .
6. Preferred routing Directions.
7. Pitch of the routing tracks.
8. Antena Rules.
9. Routing Blockages

In physical info height,area,width are present.
and also it contains two views
1)Cell View:
In this all layout information is present,it is used at the time of tapeout
2)FRAM view:
Fram view is abstract view, it is used at the Place & Route

TECHNOLOGY FILE

Technology file: format is .tf:

1. It contains Name,Number conventions of layer and via
2. It contains Physical,electrical characteristics of  layer and via
3. In Physical characteristics Min width,area,height are present.
4. In Electrical characteristics Current Density is present.
5. Units and Precisions of layer and via .
6. Colors and pattern of layer and via .
7. Physical Design rules of layer and via
8. In Physical Design rules Wire to Wire Spacing,Min Width between Layer and via are present.

TLU+

TLU+ files: format is .TLUP:

1. R,C parasitics of metal per unit length.
2. These(R,C parasitics) are used for calculating Net Delays.
3. If TLU+ files are not given then these are getting from .ITF file.
4. For Loading TLU+ files we have load three files .
5. Those are Max Tlu+,Min TLU+,MAP file.
6. MAP file maps the .ITF file and .tf file of the layer and via names.

NETLIST

Netlist: Format is .V

It contains Logical connectivity Of all Cell(Std cells,Macros).
It contain List of nets.
In the design for Knowing connectivity by using Fly lines.

SDC

SDC(Synopsys design Constraints) :Format is .SDC :

These Constraints are timing Constraints .
These Constraints used for to meet timing requirements.
Constraints are

1. CLOCK DEFINITIONS:Create Clock Period.
2. Generated Clock Definitions
3. Input Delay
4. Output Delay
5. I/O delay
6. Max delay
7. Min Delay
8. --------------->Exceptions<-------------------------
9. Multi cycle path
10. False path
11. Half cycle path
12. Disable timing arcs
13. Case Analysis

Multi cycle path, False path are Exceptions.

OPTIMIZATION CONTROLS

Design Optimization Controls :

1. Enable multiple clocks per register
2. Enable constant propagation
3. Enable multiple port net buffering
4. Enable Constant net buffering
5. Apply timing derating for On-Chip variations
6. Define Don't use or preferred cells
7. Keep Spare cells and unloaded cells
8. Apply area constraints and area recovery
9. Apply area and power cricalranges.
10. Organize paths into groups
11. Prevent clock as data networks
12. modify optimization priorities if needed
13. Enable recovery and removal check.

Face to Face Interview Pattern

Face to Face Interview Pattern

This Post explain you:

• What's the pattern of Face to Face interview?
• What type of question interviewers ask?
• What they are expecting from you ?
• What kind of details, you should provide?
• What's the concept of those questions?

Face to face interview usually has different phases and there is no predefined process also. Few start in one way and other in other way. It depends on person to person Or Organization to Organization. But more or less, everyone is going to ask anyone (or all) of the below mentioned categories.

Category 1: Based on Previous Experience

Starts with the details of what you have done in your previous organization or during the college time. It will be good if you have mentioned almost all the projects in your profile, so that interviewer can pick any one of them directly and ask the details. Question will be like this.

·         Tell me more about project X.

o   This is a very wide question but exactly the interviewer is going to ask, if you will ans as per that then it will be good, else they will ask you themselves. J

o   Expected area supposed to be cover :

§  Few more basic details about the project, so that interviewer can understand the project in broad sense.

·         Technology, Foundry, Tools used, team size, duration.

§  What were the initial parameters for the project and Final goal of that?

§  What was your role (major /minor /equal)?

§  Whether you were involved from the starting or you started in between?

§  What type of issues/challenges you have faced and any 1-2 examples of that?

§  How you have solved /rectify / workaround of those issues?

§  How did you know that your approach was sufficient and accurate?

§  How did you insure the final design was good quality?  How did you know that approach was sufficient?

§  How did you insure the final design was good quality?  How did you know that approach was sufficient?

§  Why did you choose to solve the problem one way instead of another way?

§  What would you change about the way your company approaches this problem? And if you are confident in your approach, why you haven’t use that one.

·         During the time you are explaining, few interviewer goes into the details, just to know how good you are in the technical / professional/ behavioral side. They wanted to know…

o   How seriously you have taken that project?

o   Have you just completed that projected or you have learned something also?

o   Your horizontal knowledge level (knowledge about different aspect of Project) and your vertical knowledge level (expertize in any of the field).

o   If similar type of work they are doing in their company – how can they use your knowledge with less training?

o   How open minded are you? There might be several ways to solve a problem, have you tried /know about them or just did whatever your senior asked you to do.

o   You attitude toward your work and project.

·         They can ask few cross question on technical side also. I will discuss those in the separate category.

·         Why are you leaving the previous company?

o   I know most of the time the reason can be anyone or more then these.

§  You don’t like your manager.

§  You don’t like work.

§  Work is good but now there is no growth.

§  No work life balance in company.

§  Financial issues.

§  If you are changing the city – might be personal issues (like health / family)

§  Company is not doing well and you are worried about your future.

§  You want to change your profile.

o   Expected Ans:

§  As such everyone expected the real ans, but this is also correct that sometime they can’t digest the reality. So My suggestion is always say true but if in case the truth is very harsh/ugly (like you don’t like your manager), you have to be little diplomatic.

§  Like in the above case – if you are leaving because of your manager then best ans is – “I am leaving my current company because somehow I am not able to match my frequency with my manager. I have tried a lot – even he also did. But my priorities are different (like I want some work-life balance) and he has different priorities (he is expecting me to work 16Hr average). So in short, just because of family pressure, I have to take this decision.”

§  Now- this is just one example (work-life balance), you can specify your mismatching point between your manager here. Point is – if you will say directly that I am leaving because of your manager- it’s not the exact reason. You reason is you both are not compatible with each other because of several reasons. This type of ans shows that you made effort to fix these issues but finally it looks to you that it’s not possible.

o   Reason of such type of question –

§  Interviewer wants make sure that your interest is not conflicting with the requirement.

§  Like- you have mentioned that you can’t work in night and the requirement is to work with US people.

§  Your reason was salary and they don’t have that much of budget for that position.

§   Your reason is too much of travelling – and their job is a marketing job with lot of client visit.

§  You are looking for some development work and they don’t have any such work.

Category 2: Based on Job profile for which they are interviewing

This is the category where interviewer will check your expertize about a particular type of work (as per the company requirement). It depends how’s the interviewer and how’s the process supposed to followed by the company but I can divide the whole process in following subcategories.

1.       Short Q&A –

a.       Here interviewer will ask you such questions which can be answered in just 1-2 lines.

b.      Just to check whether you know the subject or not.

c.       Sometime these questions are for like starters of the main Lunch. J

d.      These questions are similar to telephonic interview.

e.      E.g – What is setup and hold? (I will list down a lot of such question later in this post)

2.       Concept based theoretical Q&A-

a.       There is no direct ANS for such questions. If you have knowledge, then only you can ans this.

b.      Just to check your understanding the subject or say to figure out how good you are and what’s the depth of your knowledge.

c.       Most of the time, interviewer is going to ask you cross-questions. Means he/she will ask the questions based on your ANS. They will show you that they don’t know anything, and they want to understand that concept from you. J

d.      E.g – what’s the need of STA in design, Please explain? (I will list down a lot of such question later in this post)

3.       Concept based Practical Q&A-

a.       They will provide you a circuit and will ask you to solve that circuit for some parameters. (like setup / hold / delay/ clock frequency)

b.      They want to understand how good you are in applying the theoretical knowledge into the real world (in practical).

c.       This is again to know your expertize and in-depth knowledge for any topic.

d.      Sometime these questions are runtime generated. And Interviewer can change the value of any parameter at any point of time (just to make the situation worst for you).

e.      Sometime they will miss some parameter intentionally, just to see whether you will ask for that parameter or not.

4.       Case study or Experienced based Q&A –

a.       Here they will share few of the real design issues in the form of case study, and need your suggestions to fix those issues.

b.      They knew how they have or someone else fixed those issues but they just wanted to know how many solutions you can suggest/proposed. Basic intension of such question is to figure out how wide you can think to solve a problem.  It’s like- you know theory/concepts/practical concept but they want to check

                                                               i.      Whether you know what can be implementing at what places and why?

                                                             ii.      During the implementation, which solution is going to solve which problem?

                                                            iii.      What are the different solutions of a single problem?

                                                           iv.      Do you know any work around of that specific problem?

c.       Testing your thinking and imagination power also. How open minded you are and how fast you can start to fix a problem.

d.      E.g- in a 2million gate design, which 20 blocks, where most of the logic are implemented inside the blocks only, using 50% HVT cells , 30% SVT and 20% RVT. - We are getting a power number 40Watt but the requirement is 30W. if we are making any changes in the type of the vt cells then we are not able to close the setup in one of the corner out of 7 corners. So, what are the things we can do to reduce this number?

Now face to face technical questions with respect to different topics, we will discuss one by one as per the above subcategory in the next few post.