Short-Channel Effects in MOSFETs

Short-Channel Devices

A MOSFET device is considered to be short when the channel length is the same order of magnitude as the depletion-layer widths (xdD, xdS) of the source and drain junction. As the channel length L is reduced to increase both the operation speed and the number of components per chip, the so-called short-channel effects arise. 

Short-Channel Effects

The short-channel effects are attributed to two physical phenomena:

1. the limitation imposed on electron drift characteristics in the channel, 

2. the modification of the threshold voltage due to the shortening channel length.

In particular five different short-channel effects can be distinguished:

1. drain-induced barrier lowering and punchthrough 

2. surface scattering 

3. velocity saturation 

4. impact ionization 

5. hot electrons 

Drain-induced barrier lowering and punchthrough

The expressions for the drain and source junction widths are:

where VSB and VDB are source-to-body and drain-to-body voltages.

When the depletion regions surrounding the drain extends to the source, so that the two depletion

layer merge (i.e., when xdS + xdD = L), punchtrough occurs. Punchthrough can be minimized with

thinner oxides, larger substrate doping, shallower junctions, and obviously with longer channels.

The current flow in the channel depends on creating and sustaining an inversion layer on the

surface. If the gate bias voltage is not sufficient to invert the surface (VGS<VT0), the carriers

(electrons) in the channel face a potential barrier that blocks the flow. Increasing the gate voltage

reduces this potential barrier and, eventually, allows the flow of carriers under the influence of the

channel electric field. In small-geometry MOSFETs, the potential barrier is controlled by both the

gate-to-source voltage VGS and the drain-to-source voltage VDS. If the drain voltage is increased, the potential barrier in the channel decreases, leading to drain-induced barrier lowering (DIBL). The

reduction of the potential barrier eventually allows electron flow between the source and the drain,

even if the gate-to-source voltage is lower than the threshold voltage. The channel current that flows

under this conditions (VGS<VT0) is called the sub-threshold current.

 

Surface scattering 

As the channel length becomes smaller due to the lateral extension of the depletion layer into the channel region, the longitudinal electric field component ey increases, and the surface mobility becomes field-dependent. Since the carrier transport in a MOSFET is confined within the narrow inversion layer, and the surface scattering (that is the collisions suffered by the electrons that are accelerated toward the interface by ex) causes reduction of the mobility, the electrons move with great difficulty parallel to the interface, so that the average surface mobility, even for small values of ey, is about half as much as that of the bulk mobility.

Velocity saturation

The performance short-channel devices is also affected by velocity saturation, which reduces the transconductance in the saturation mode. At low ey, the electron drift velocity vde in the channel varies linearly with the electric field intensity. However, as ey increases above 104 V/cm, the drift velocity tends to increase more slowly, and approaches a saturation value of vde(sat)=107 cm/s around ey =105 V/cm at 300 K. 

Note that the drain current is limited by velocity saturation instead of pinchoff. This occurs in shortchannel devices when the dimensions are scaled without lowering the bias voltages. Using vde(sat), the maximum gain possible for a MOSFET can be defined as

Impact ionization

Another undesirable short-channel effect, especially in NMOS, occurs due to the high velocity of electrons in presence of high longitudinal fields that can generate electron-hole (e-h) pairs by impact ionization, that is, by impacting on silicon atoms and ionizing them. 

It happens as follow: normally, most of the electrons are attracted by the drain, while the holes enter the substrate to form part of the parasitic substrate current. Moreover, the region between the source and the drain can act like the base of an npn transistor, with the source playing the role of the emitter and the drain that of the collector. If the aforementioned holes are collected by the source, and the corresponding hole current creates a voltage drop in the substrate material of the order of .6V, the normally reversed-biased substrate-source pn junction will conduct appreciably. Then electrons can be injected from the source to the substrate, similar to the injection of electrons from the emitter to the base. They can gain enough energy as they travel toward the drain to create new eh pairs. The situation can worsen if some electrons generated due to high fields escape the drain field to travel into the substrate, thereby affecting other devices on a chip. 

Hot electrons 

Another problem, related to high electric fields, is caused by so-called hot electrons. This highenergy electrons can enter the oxide, where they can be trapped, giving rise to oxide charging that can accumulate with time and degrade the device performance by increasing VT and affect adversely the gate’s control on the drain current.