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Tuesday 7 April 2015

Dynamic (switching) power

As we seen in earlier blog the average power consumed by the CMOS circuit can be devided into three different components. They are:


1)Dynamic (switching)power consumption
2)Short circuit power consumption
3)Static (Leakage) power consumption

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Dynamic (switching) power dissipation

As the name indicates it occurs when signals which goes through the CMOS circuits change their logic state. At this moment energy is drawn from the power supply to charge up the output node capacitance.Charging up of the output capacitance causes transition from 0V to Vdd.Considering an inverter example power drawn from the power supply is
dissipated as heat in pMOS transitor. On the other hand charge down process causes NMOS
transistor to dissipate heat. Output capacitance of the CMOS logic gate consists of

below components:

1)Output node capacitance of the logic gate: This is due to the drain diffusion region.
2)Total interconnect capacitance: This has higher effect as technology node shrinks.
3)Input node capacitance of the driven gate: This is due to the gate oxide capacitance.

To find the avearage power energy required to charge up the output node to Vdd and charge down the total output load capacitance to ground level is integrated. Applied input periodic waveform having its period T is assumed to be having zero rise and fall time. Note that average power is independent of transistor size and characteristics.

Internal power 

This is the power consumed by the cell when an input changes, but output does not change. In logic gates not every change of the current running through an input cell necessarily leads to a change in the state of the output net. Also internal node voltage swing can be only Vi which can be smaller than the full voltage swing of Vdd leading to the partial voltage swing.

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How to reduce dynamic power?


1)reduce power supply voltage Vdd
2)reduce voltage swing in all nodes
3)reduce the switching probabilty (transition factor)
4)reduce load capacitance


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Reference:


[1] Sung Mo Kang and Yusuf Leblebici, CMOS digital integrated circuits-analysis and design, Tata McGraw hill, third edition, 2003
[2]Astro User Guide, Version X-2005.09, September 2005


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